Date of Award

Spring 2026

Document Type

Open Access Dissertation

Department

Electrical Engineering

First Advisor

Adel Nasiri

Abstract

Modern microgrids, EV chargers, and renewable energy systems require power converters that are efficient, compact, and capable of high-frequency, high-power operation. However, in tightly packaged high-power designs, parasitic inductances and capacitances become significant, leading to voltage overshoot and elevated electromagnetic interference (EMI) under rapid dv/dt transitions. To address these challenges, this work presents a PCB-based 25kW, 480V, 200kHz grid-connected three-level active neutral-point-clamped (3L-ANPC) converter employing GaN devices. The PCB design emphasizes the optimization of parasitic inductances and capacitances to enhance high-voltage safety and reliability. A multilayer PCB busbar structure is implemented to minimize parasitic loops, enabling fast switching with minimal voltage overshoot. This approach achieves a compact, high-power-density converter that operates reliably without bulky snubbers and with reduced filtering and cooling requirements. Simulations and experimental results validate the converter’s performance and modeling accuracy for applications in EV charging, microgrids, and renewable energy systems. EMI performance is analyzed using a combined common-mode equivalent circuit model (CEM) and mixed-mode (MM) model, incorporating PCB-extracted parasitic capacitances to predict both common- and differential-mode noise. Conducted EMI on the DC bus was measured from 150kHz to 30MHz using CISPR-22 Class B-compliant 50Ω / 50μH Line Impedance Stabilization Networks (LISNs). The measurements show strong agreement with circuit-level simulations incorporating the same extracted parasitics and LISN  models, validating the proposed methodology as a consistent foundation for EMI prediction and filter design. Furthermore, various PWM strategies for the 3L-ANPC converter are investigated to explore the trade-off between efficiency and EMI. The analysis quantifies how different switching patterns distribute losses among devices and how commutation-loop geometry influences common-mode voltage excitation in the 25kW, 200kHz platform. Simulation and experimental results confirm that EMI can be reduced by employing well-coupled commutation loops without compromising efficiency, providing clear design guidelines for EMI-aware high.

Rights

© 2026, Mohammad Hassan Adeli

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