Conductance has been studied in metal-oxide-silicon field-effect transistor accumulation-layer samples in which it is possible to constrict the channel to small dimensions both perpendicular to the surface and perpendicular to the channel. A temperature-dependent conductance σ=σ0exp[-(T0/T)n] is observed, where n=1/2 for small channel widths and n=1/3 for larger channel widths. It is believed that this behavior arises from a transition from one-dimensional to two-dimensional variable-range hopping in the sample.
Published in Physical Review Letters, ed. Gene D. Sprouse, Volume 48, Issue 3, 1982, pages 196-199.
Fowler, A. B., Hartstein, A., & Webb, R. A. (1982). Conductance in restricted-dimensionality accumulation layers. Physical Review Letters, 48(3), 196-199. DOI: 10.1103/PhysRevLett.48.196
© Physical Review Letters, 1982, American Physical Society