Date of Award

Fall 2022

Document Type

Open Access Dissertation


Electrical Engineering

First Advisor

Herbert L. Ginn


In the last decade, because of some key features and advantages of Modular Multilevel Converter (MMC), it is widely applied for various Medium Voltage (MV) and High Voltage (HV) power electronic interfacing applications. The structure of MMCs varies by application but in general, they are composed of multiple Sub-Modules (SMs) which each contains a floating capacitor. For the operation of MMCs, capacitor voltages are required to remain equally set. This is referred to as the balanced condition and requires a method for SM Capacitor Voltage Balancing (CVB). Connections of SMs for most of the common MMC configurations result in additional current paths that are not desirable in a normal operation referred to as circulating currents. Methods for voltage balancing are in some cases combined with modulation techniques used for the switching control in each SM, however, circulating current suppression is generally performed as a separate feedback control system in parallel with other low-level feedback control functions.

In this dissertation research, a novel combined CVB with a Circulating Current Nullification Control (CCNC) algorithm is proposed as part of a modified multi-carrier Pulse Width Modulation (PWM) technique. The proposed method employs a modification as compared to the conventional modulation technique for MMCs, therefore, advantages and disadvantages are quantified with respect to the harmonic distortion of the AC output, peak-to-peak value SM capacitor voltage ripple, and peak-to-peak magnitude of circulating current. The proposed method provides a superior circulating current suppression, voltage balancing, and harmonic profile across the full range of operations of an MMC.

The proposed method is analyzed in simulation followed by hardware validation. The developed PWM technique is implemented in a Field-Programmable Gate Array (FPGA) based decentralized control platform for three-phase MMCs, and then Controller-Hardware-In-the-Loop (CHIL) testing is performed using a hardware-validated MMC Real-Time (RT) simulator. The CHIL results validate the performance of the FPGA-based hardware implementation of the CVB and CCNC-driven multicarrier PWM technique. Finally, the proposed multi-carrier PWM is experimentally tested with a six sub-module 60-kW rated three-phase laboratory prototype MMC.

Available for download on Friday, December 15, 2023