Date of Award
Campus Access Dissertation
Tangali S Sudarshan
Silicon Carbide (SiC) has long been considered a material of choice for high power and high frequency devices due to its wide band gap, high breakdown field, and high thermal conductivity. Chemical vapor deposition (CVD) of 4H-SiC using silane (SiH4) and light hydrocarbons e.g. propane (C3H8) or ethylene (C2H4) is the standard technology of growing epitaxial layers for any device applications. For high-voltage (>10 kV) devices made of SiC thick (>100 μm), low doped (~2x1014 cm-3) epilayers are needed. To obtain such thickness with standard silane-based CVD process, which have growth rates of 6-7 um/hr, process times would typically exceed ten hours, leading to a significant increase in the manufacturing cost. Growth rates higher than the usual may be achieved by increasing precursor flow, this typically leads to homogeneous nucleation of liquid silicon droplets, eventually decreasing the efficiency of precursor use and degrading crystal quality. Due to its unique material properties, SiC has great potential to replace conventional semiconductors in high frequency applications. Semi-insulating (SI) epitaxial layers are required to achieve this. Most common method for introducing the SI property to the substrate is to use vanadium as a deep level dopant to pin the Fermi level near the mid-bandgap. Although this is the original conceived method for producing commercial SI substrates, reports indicate that vanadium degrades crystal quality as indicated by increased FWHM of X-ray diffraction rocking curve. In this dissertation both of the above mentioned problems are addressed. Thick (100 μm), high quality low doped (~2x1014 cm-3) 4H-SiC epilayers have been grown in a vertical hot-wall chemical vapor deposition system at a high growth rate (50-100 μm/hr ) on (0001) 80 off-axis substrates. Novel precursor Dichlorosilane (SiH2Cl2) is used as Siprecursor, using the idea that the silicon droplets can be dissolved by the presence of species that bind stronger to silicon than silicon itself. X-ray rocking curves indicate that the epilayers were of high crystallinity, with linewidths as narrow as 7.8 arcsec being observed, while microwave photoconductive decay (μPCD) measurements indicated that these films had high injection (ambipolar) carrier lifetimes in the range of 2 μs. These films also appeared to be free of polytype inclusions. Thick high purity semi-insulating (SI) homoepitaxial layers on Si-face 4H-SiC have been grown systematically, with resistivity ≥ 109 -cm. This is done by maintaining high C/Si ratio during chemical vapor deposition over a relatively wide C/Si ratio window (1.3-1.5). A reconciliation of impurity concentration with measured resistivity indicated a compensating trap concentration of ~1015 cm-3 present in the SI-epilayer, and is supported by quenched photoluminescence lifetimes. High resolution photo-induced transient spectroscopy (HRPITS) analysis identified these traps as Si-vacancy related deep defect centers, with no detectable EH6/7 and Z1/2 levels, consistent with the higher C/Si ratio. A recombination lifetime of ~5ns suggests application in fast-switching power devices.
Chowdhury, I. A.(2010). High Growth Rate and High Purity Semi-Insulating Epitaxy Using Dichlorosilane For Power Devices. (Doctoral dissertation). Retrieved from https://scholarcommons.sc.edu/etd/2172