Date of Award

2015

Document Type

Open Access Dissertation

Department

Electrical Engineering

First Advisor

Asif Khan

Abstract

AlInN has attracted much attention only recently as a material due to its unique and superior material properties, which is however known to be difficult to be grown among the III-nitride ternary compounds. The electrons confined at the heterointerface of coherently grown AlInN on GaN buffer layers determine crucial electronic properties. This dissertation has been designed targeting the lattice matched AlInN/GaN investigation with very detail to optimize the design, fabrication process, and electronic properties to realize AlInN/GaN HEMTs. Each single step of this process was optimized in order to improve device performance.

The work started with establishing the main features of AlInN/GaN heterostructure in a HEMT configuration through optimizing the device fabrication and investigation of the DC characteristics of planar HEMTs. The study included heterostructures with variable barrier thicknesses along with barrier cap layer. A series of experiments were conducted to analyze the impact of barrier thickness on breakdown and threshold-voltage by fabricating devices with different gate to drain separation and incorporating field plated gate design. In addition, a series of experiments were conducted on barrier scaling study of the heterostructure to develop plasma based selective area recess etching to obtain and demonstrate, first ever reported, normally off high threshold voltage AlInN/GaN metal-insulator HEMTs with high current density of 0.7A/mm and high breakdown voltage of 350V and the highest reported threshold voltage of +1.5V. Moreover, investigation of substrate influence was also performed by fabricating and characterizing AlInN/GaN HEMTs on SiC substrate with different gate dimensions and the transport properties of the devices were discussed.

Next, the device performance has been studied by incorporating Ga in AlInN barrier. Introducing 2% Ga at the AlInN barrier layer is found to increase the current density of about 15% compared to the LM AlInN/GaN HEMTs. This issue has been studied intensively and the preliminary results indicated that even slightest deviations from atomically perfect interfaces leads to the creation of huge piezoelectric fields, increasing the carrier density at the AlInN/GaN interface.

Finally, multifinger AlInN/GaN HEMTs were fabricated to obtain large periphery (LP) devices for high power application. The heart of this work was the design and development of a high yield process technology for high performance LP AlInN/GaN HEMTs. The study of large periphery devices presented the problem of large heat dissipation. Therefore, for future work, new device fabrication and packaging processes for efficient heat dissipation from the top of the device was also proposed.

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