We present a digital-oxide-deposition (DOD) technique to deposit high quality SiO2dielectric layers by plasma-enhanced chemical vapor deposition using alternate pulses of silicon and oxygen precursors. The DOD procedure allows for a precise thickness control and results in extremely smooth insulating SiO2 layers. An insulating gate AlGaN∕GaNheterostructurefield-effect transistor(HFET) with 8nm thick DOD SiO2dielectric layer had a threshold voltage of −6V (only 1V higher than that of regular HFET), very low threshold voltage dispersion, and output continuous wave rf power of 15W∕mm at 55V drain bias.
Published in Applied Physics Letters, Volume 88, Issue 18, 2006, pages #182507-.
©Applied Physics Letters 2006, AIP Publishing.
Adivarahan, V., Rai, S., Tipirneni, N., Koudymov, A., Yang, J., Simin, G., & Khan, M. A. (1 May 2006). Digital Oxide Deposition of SiO2 Layers for III-Nitride Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors. Applied Physics Letters, 88 (18), #182507. http://dx.doi.org/10.1063/1.2198508